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Self-Checking and Fault-Tolerant Digital Design

Self-Checking and Fault-Tolerant Digital Design - The Morgan Kaufmann Series in Computer Architecture and Design

Hardback (01 Jun 2000)

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Publisher's Synopsis

With VLSI chip transistors getting smaller and smaller, today's digital systems are more complex than ever before. This increased complexity leads to more cross-talk, noise, and other sources of transient errors during normal operation. Traditional off-line testing strategies cannot guarantee detection of these transient faults. And with critical applications relying on faster, more powerful chips, fault-tolerant, self-checking mechanisms must be built in to assure reliable operation.

Self-Checking and Fault-Tolerant Digital Design deals extensively with self-checking design techniques and is the only book that emphasizes major techniques for hardware fault tolerance. Graduate students in VLSI design courses as well as practicing designers will appreciate this balanced treatment of the concepts and theory underlying fault tolerance along with the practical techniques used to create fault-tolerant systems.

Book information

ISBN: 9780124343702
Publisher: Elsevier Science
Imprint: Morgan Kaufmann
Pub date:
DEWEY: 004.2
DEWEY edition: 21
Language: English
Number of pages: 216
Weight: 620g
Height: 235mm
Width: 187mm
Spine width: 14mm