Recent Advances in PMOS Negative Bias Temperature Instability Characterization and Modeling of Device Architecture, Material and Process Impact

This book covers advances in Negative Bias Temperature Instability (NBTI) and will prove useful to researchers and professionals in the semiconductor devices areas. NBTI continues to remain as an important reliability issue for CMOS transistors and circuits. Development of NBTI resilient technology relies on utilizing suitable stress conditions, artifact free measurements and accurate physics-based models for the reliable determination of degradation at end-of-life, as well as understanding the process, material and device architectural impacts. This book discusses: 

BTI Analysis Tool (BAT), a comprehensive physics-based framework, to model the measured time kinetics of parametric drift during and after DC and ACstress, at different stress and recovery biases and temperature, as well as pulse duty cycle and frequency. 

The Reaction Diffusion (RD) model is used for generated interface traps, Transient Trap Occupancy Model (TTOM) for charge occupancy of the generated interface traps and their contribution, Activated Barrier Double Well Thermionic (ABDWT) model for hole trapping in pre-existing bulk gate insulator traps, and Reaction Diffusion Drift (RDD) model for bulk trap generation in the BAT framework; NBTI parametric drift is due to uncorrelated contributions from the trap generation (interface, bulk) and trapping processes.