Publisher's Synopsis
Progress in MOS integrated-circuit technology is largely driven by the ability to dimensionally scale the constituent components of individual devices and their associated interconnections. Given a set of materials with fixed properties, this scaling is finite and its predicted limits are rapidly approaching. The International Technology Roadmap for Semiconductors establishes the pace at which this scaling occurs and identifies many of the technological challenges ahead. This volume assembles representatives from the fields of materials science, physics, electrical and chemical engineering to provide an insightful review of current technology and understanding. Specifically, the intent is to discuss materials issues stemming from device scaling to sub-100nm technology nodes. Topics include: high-k characterization; atomic layer deposition; gate metal materials and integration; contacts and ultrashallow junction formation; theory and modeling and crystalline oxides for gate dielectrics.
