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Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures

Modeling, Analysis and Optimization of Network-on-Chip Communication Architectures - Lecture Notes in Electrical Engineering

2013

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Publisher's Synopsis

Traditionally, design space exploration for Systems-on-Chip (SoCs) has focused on the computational aspects of the problem at hand. However, as the number of components on a single chip and their performance continue to increase, the communication architecture plays a major role in the area, performance and energy consumption of the overall system. As a result, a shift from computation-based to communication-based design becomes mandatory. Towards this end, network-on-chip (NoC) communication architectures have emerged recently as a promising alternative to classical bus and point-to-point communication architectures.

In this dissertation, we study outstanding research problems related to modeling, analysis and optimization of NoC communication architectures. More precisely, we present novel design methodologies, software tools and FPGA prototypes to aid the design of application-specific NoCs.

Book information

ISBN: 9789400798656
Publisher: Springer Netherlands
Imprint: Springer
Pub date:
Edition: 2013
DEWEY: 621.381531
DEWEY edition: 23
Language: English
Number of pages: 174
Weight: 2934g
Height: 235mm
Width: 155mm
Spine width: 10mm