Delivery included to the United States

Logic Synthesis and Verification Algorithms

Logic Synthesis and Verification Algorithms

1996

Paperback (10 Feb 2006)

Not available for sale

Out of stock

This service is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Publisher's Synopsis

This book blends mathematical foundations and algorithmic developments with circuit design issues. Each new technique is presented in the context of its application to design. Through the study of optimal two-level and multilevel combinational circuit design, the reader is introduced to basic concepts, such as Boolean algebras, local search, and algebraic factorization. Similarly, through the study of optimal sequential circuit design, the reader is introduced to graph algorithms, finite state systems, and language theory. Throughout the book, recurrent themes such as branch and bound, dynamic programming, and symbolic implicit enumeration are used to establish optimal design principles.

Book information

ISBN: 9780387310046
Publisher: Springer US
Imprint: Springer
Pub date:
Edition: 1996
DEWEY: 621.395
DEWEY edition: 22
Language: English
Number of pages: 564
Weight: 1830g
Height: 235mm
Width: 155mm
Spine width: 30mm