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Enabling Technologies for 3-D Integration

Enabling Technologies for 3-D Integration Symposium Held November 27-29, 2006, Boston, Massachusetts, U.S.A - Materials Research Society Symposium Proceedings

Hardback (30 Mar 2007)

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Publisher's Synopsis

An emerging technology or device architecture called 3-D IC integration is based on the system performance gains that can be achieved by stacking and vertically interconnecting distinct device chips. The 3-D concept of replacing long 2-D interconnects with shorter vertical (3-D) interconnects has the potential to alleviate the well-known interconnect (RC) delay problem facing the semiconductor industry. Additional benefits of the 3-D concept for the IC maker include reduced die size and the ability to use distinct technologies (analog, logic, RF, etc…) on separate vertically interconnected layers. The 3-D concept, therefore, allows the integration of otherwise incompatible technologies, and offers significant advantages in performance, functionality, and form factor. Topics in this book include: fabrication of 3-D ICs; modeling, simulation and scaling of 3-D integrated devices; applications of 3-D integration; through wafer interconnects for 3-D packaging and interposer applications; bonding technology for 3-D integration; and enabling processes for 3-D integration.

About the Publisher

Cambridge University Press

Cambridge University Press dates from 1534 and is part of the University of Cambridge. We further the University's mission by disseminating knowledge in the pursuit of education, learning and research at the highest international levels of excellence.

Book information

ISBN: 9781558999275
Publisher: Materials Research Society
Imprint: Cambridge University Press
Pub date:
DEWEY: 621.367
DEWEY edition: 22
Language: English
Number of pages: 295
Weight: 545g
Height: 234mm
Width: 155mm
Spine width: 20mm