Publisher's Synopsis
System–on–a–chip (SoC) has become an essential technique to lower product costs and maximize power efficiency, particularly as the mobility and size requirements of electronics continues to grow. It has therefore become increasingly important for electrical engineers to develop a strong understanding of the key stages of hardware description language (HDL) design flow based on cell–based libraries or field–programmable gate array (FPGA) devices. Honed and revised through years of classroom use, Lin focuses on developing, verifying, and synthesizing designs of practical digital systems using the most widely used hardware description Language: Verilog HDL.
- Explains how to perform synthesis and verification to achieve optimized synthesis results and compiler times
- Offers complete coverage of Verilog syntax
- Illustrates the entire design and verification flow using an FPGA case study
- Presents real–world design examples such as LED and LCD displays, GPIO, UART, timers, and CPUs
- Emphasizes design/implementation tradeoff options, with coverage of ASICs and FPGAs
- Provides an introduction to design for testability
- Gives readers deeper understanding by using problems and review questions in each chapter
- Comes with downloadable Verilog HDL source code for most examples in the text
- Includes presentation slides of all book figures for student reference
Digital System Designs and Practices: Using Verilog HDL and FPGAs is an ideal textbook for either fundamental or advanced digital design courses beyond the digital logic design level. Design engineers who want to become more proficient users of Verilog HDL as well as design FPGAs with greater speed and accuracy will find this book indispensable.
