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A Systematic Methodology for Verifying Superscalar Microprocessors

A Systematic Methodology for Verifying Superscalar Microprocessors

Paperback (27 Aug 2018)

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Publisher's Synopsis

We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function by using completion functions, one per unfinished instruction, each of which specifies the effect (on the observables) of completing the instruction. In addition to avoiding the term size and case explosion problem that limits the pure flushing approach, our method helps localize errors, and also handles stages with interactive loops. The technique is illustrated on pipelined and superscalar pipelined implementations of a subset of the DLX architecture. It has also been applied to a processor with out-of-order execution.Srivas, Mandayam and Hosabettu, Ravi and Gopalakrishnan, GaneshLangley Research CenterMICROPROCESSORS; COMPUTER SYSTEMS DESIGN; PIPELINING (COMPUTERS); ARCHITECTURE (COMPUTERS); MULTIPROCESSING (COMPUTERS); DATA PROCESSING EQUIPMENT; COMPUTER SYSTEMS PERFORMANCE; REGISTERS (COMPUTERS); THEOREM PROVING...

Book information

ISBN: 9781726165341
Publisher: Createspace Independent Publishing Platform
Imprint: Createspace Independent Publishing Platform
Pub date:
Number of pages: 40
Height: 12mm
Width: 9mm
Spine width: 1mm